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Answer by mcleod_ideafix for A different way to share the memory bus between...
Did any retrocomputing system buffer the write so as to let the CPU run at full speed whenever it's not reading from the framebuffer (which is practically always)?Yes, the Inves Spectrum +. A clone...
View ArticleAnswer by tahrey for A different way to share the memory bus between the CPU...
It's not just the systems you mentioned; in almost everything from the era, other than the IBM PC (with its discrete - and not particularly high performance, merely higher performance than hanging...
View ArticleAnswer by Tommy for A different way to share the memory bus between the CPU...
Re: did any computer use this scheme, which I think is still unanswered; yes: several.The TMS9818[/a] was used by the TI99/4[/a], MSX, ColecoVision, and many more. It doesn't share RAM with the CPU, it...
View ArticleAnswer by tofro for A different way to share the memory bus between the CPU...
You seem to assume a single latch could suffice buffering video memory writes from the CPU while the RAM is busy shifting out bits to the DAC.That would assume that a single CPU instruction is only...
View ArticleAnswer by Raffzahn for A different way to share the memory bus between the...
So what's with this design decision? Not as helpful as it looks on first sight.For one, it does need at least three chips for latching the data (8 Bit Data and 11 to 16 bit address) plus a considerable...
View ArticleAnswer by Jules for A different way to share the memory bus between the CPU...
In addition to pjc50's answer (i.e. that performance simply wasn't a high priority design goal for these systems), there are more things to consider, at least for the Spectrum:A cheaper way of...
View ArticleAnswer by pjc50 for A different way to share the memory bus between the CPU...
Ultimately these computers were designed with price as a primary design goal, rather than squeezing the absolute maximum performance possible.First you'd have to separate the video memory. The screen...
View ArticleA different way to share the memory bus between the CPU and the Video
Considering the ZX Spectrum, part of the memory is accessible to both the ULA and the CPU, and the CPU is slowed down when it is using that area, so that the framebuffer can be read out. As I...
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